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1. general description the 74lvc1g14 provides the inverting buffer fu nction with schmitt-trigger input. it is capable of transforming slowly changing input signals into sharply defined, jitter-free output signals. the input can be driven from either 3.3 v or 5 v devices. this feature allows the use of this device in a mixed 3.3 v and 5 v environmen t. schmitt-trigger action at the input makes the circuit tolerant for slower input rise and fall time. this device is fully specified for pa rtial power-down ap plications using i off . the i off circuitry disables the output, preventing the damaging backflow current through the device when it is powered down. 2. features and benefits ? wide supply voltage range from 1.65 v to 5.5 v ? high noise immunity ? complies with jedec standard: ? jesd8-7 (1.65 v to 1.95 v) ? jesd8-5 (2.3 v to 2.7 v) ? jesd8-b/jesd36 (2.7 v to 3.6 v). ? ? 24 ma output drive (v cc =3.0v) ? cmos low power consumption ? latch-up performance exceeds 250 ma ? direct interface with ttl levels ? unlimited rise and fall times ? input accepts voltages up to 5 v ? multiple package options ? esd protection: ? hbm jesd22-a114f exceeds 2000 v ? mm jesd22-a115-a exceeds 200 v. ? specified from ? 40 ? cto+85 ? c and ? 40 ? cto+125 ? c. 3. applications ? wave and pulse shaper ? astable multivibrator ? monostable multivibrator 74lvc1g14 single schmitt-trigger inverter rev. 12 ? 6 august 2012 product data sheet
74lvc1g14 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 12 ? 6 august 2012 2 of 20 nxp semiconductors 74lvc1g14 single schmitt-trigger inverter 4. ordering information 5. marking [1] the pin 1 indicator is located on the lower left corner of the device, below the marking code. 6. functional diagram table 1. ordering information type number package temperature range name description version 74lvc1g14gw ? 40 ? c to +125 ? c tssop5 plastic thin shrink small outline package; 5 leads; body width 1.25 mm sot353-1 74lvc1g14gv ? 40 ? c to +125 ? c sc-74a plastic surface-mounted package; 5 leads sot753 74lvc1g14gm ? 40 ? c to +125 ? c xson6 plastic extremely thin sm all outline package; no leads; 6 terminals; body 1 ? 1.45 ? 0.5 mm sot886 74lvc1g14gf ? 40 ? c to +125 ? c xson6 plastic extremely thin sm all outline package; no leads; 6 terminals; body 1 ? 1 ? 0.5 mm sot891 74lvc1g14gn ? 40 ? c to +125 ? c xson6 extremely thin small outline package; no leads; 6 terminals; body 0.9 ? 1.0 ? 0.35 mm sot1115 74lvc1g14gs ? 40 ? c to +125 ? c xson6 extremely thin small outline package; no leads; 6 terminals; body 1.0 ? 1.0 ? 0.35 mm sot1202 74lvc1g14gx ? 40 ? c to +125 ? c x2son5 x2son5: plastic thermal enhanced extremely thin small outline package; no leads; 5 terminals; body 0.8 ? 0.8 ? 0.35 mm sot1226 table 2. marking type number marking code [1] 74lvc1g14gw vf 74lvc1g14gv v14 74lvc1g14gm vf 74lvc1g14gf vf 74lvc1g14gn vf 74lvc1g14gs vf 74lvc1g14gx vf fig 1. logic symbol fig 2. iec logic symbol fig 3. logic diagram mna023 ay 2 4 24 mna024 mna025 a y
74lvc1g14 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 12 ? 6 august 2012 3 of 20 nxp semiconductors 74lvc1g14 single schmitt-trigger inverter 7. pinning information 7.1 pinning 7.2 pin description fig 4. pin configuration sot353-1 and sot753 fig 5. pin configuration sot886 74lvc1g14 n.c. v cc a gnd y 001aab655 1 2 3 5 4 74lvc1g14 a 001aab656 n.c. gnd n.c. v cc y transparent top view 2 3 1 5 4 6 fig 6. pin configuration sot891, sot1115 and sot1202 fig 7. pin configuration sot1226 (x2son5) 74lvc1g14 a 001aae976 n.c. gnd n.c. v cc y transparent top view 2 3 1 5 4 6 n.c. v cc gnd 1 3 2 5 4 a y aaa-003024 transparent top view 74lvc1g14 table 3. pin description symbol pin description tssop5 and x2son5 xson6 n.c. 1 1 not connected a 2 2 data input gnd 3 3 ground (0 v) y 4 4 data output n.c. - 5 not connected v cc 5 6 supply voltage
74lvc1g14 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 12 ? 6 august 2012 4 of 20 nxp semiconductors 74lvc1g14 single schmitt-trigger inverter 8. functional description [1] h = high voltage level; l = low voltage level 9. limiting values [1] the input and output voltage ratings may be exceeded if the input and output current ratings are observed. [2] when v cc = 0 v (power-down mode), the output voltage can be 5.5 v in normal operation. [3] for tssop5 and sc-74a packages: above 87.5 ? c the value of p tot derates linearly with 4.0 mw/k. for xson6 and x2son5 package: above 118 ? c the value of p tot derates linearly with 7.8 mw/k. 10. recommended operating conditions table 4. function table [1] input output a y lh hl table 5. limiting values in accordance with the absolute maximum rating system (iec 60134). voltages are referenced to gnd (ground = 0 v). symbol parameter conditions min max unit v cc supply voltage ? 0.5 +6.5 v v i input voltage [1] ? 0.5 +6.5 v v o output voltage active mode [1] [2] ? 0.5 v cc +0.5 v power-down mode [1] [2] ? 0.5 +6.5 v i ik input clamping current v i <0v ? 50 - ma i ok output clamping current v o >v cc or v o <0v - ? 50 ma i o output current v o =0 vtov cc - ? 50 ma i cc supply current - +100 ma i gnd ground current ? 100 - ma t stg storage temperature ? 65 +150 ?c p tot total power dissipation t amb = ? 40 ? c to +125 ? c [3] - 250 mw table 6. recommended operating conditions symbol parameter conditions min typ max unit v cc supply voltage 1.65 - 5.5 v v i input voltage 0 - 5.5 v v o output voltage active mode 0 - v cc v power-down mode; v cc =0v 0 - 5.5 v t amb ambient temperature ? 40 - +125 ?c
74lvc1g14 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 12 ? 6 august 2012 5 of 20 nxp semiconductors 74lvc1g14 single schmitt-trigger inverter 11. static characteristics [1] all typical values are measured at maximum v cc and t amb = 25 ? c. table 7. static characteristics at recommended operating conditions; volt ages are referenced to gnd (ground = 0 v). symbol parameter conditions ? 40 ? c to +85 ?c ? 40 ? c to +125 ?c unit min typ [1] max min max v oh high-level output voltage v i = v t+ or v t ? i o = ? 100 ? a; v cc = 1.65 v to 5.5 v v cc ? 0.1 - - v cc ? 0.1 - v i o = ? 4 ma; v cc = 1.65 v 1.2 1.54 - 0.95 - v i o = ? 8 ma; v cc = 2.3 v 1.9 2.15 - 1.7 - v i o = ? 12 ma; v cc = 2.7 v 2.2 2.50 - 1.9 - v i o = ? 24 ma; v cc = 3.0 v 2.3 2.62 - 2.0 - v i o = ? 32 ma; v cc = 4.5 v 3.8 4.11 - 3.4 - v v ol low-level output voltage v i = v t+ or v t ? i o = 100 ? a; v cc = 1.65 v to 5.5 v - - 0.10 - 0.10 v i o = 4 ma; v cc = 1.65 v - 0.07 0.45 - 0.70 v i o = 8 ma; v cc = 2.3 v - 0.12 0.30 - 0.45 v i o = 12 ma; v cc = 2.7 v - 0.17 0.40 - 0.60 v i o = 24 ma; v cc = 3.0 v - 0.33 0.55 - 0.80 v i o = 32 ma; v cc = 4.5 v - 0.39 0.55 - 0.80 v i i input leakage current v i = 5.5 v or gnd; v cc =0vto5.5v - ? 0.1 ? 5- ? 100 ? a i off power-off leakage current v i or v o = 5.5 v; v cc = 0 v - ? 0.1 ? 10 - ? 200 ? a i cc supply current v i = 5.5 v or gnd; i o = 0 a; v cc = 1.65 v to 5.5 v - 0.1 10 - 200 ? a ? i cc additional supply current v i = v cc ? 0.6 v; i o = 0 a; v cc = 2.3 v to 5.5 v - 5 500 - 5000 ? a c i input capacitance v cc = 3.3 v; v i =gndtov cc -5.0- - -pf table 8. transfer characteristics voltages are referenced to gnd (ground = 0 v); for load circuit see figure 9 . symbol parameter conditions ? 40 ? c to +85 ?c ? 40 ? c to +125 ?c unit min typ [1] max min max v t+ positive-going threshold voltage see figure 10 and figure 11 v cc = 1.8 v 0.82 1.0 1.14 0.79 1.14 v v cc = 2.3 v 1.03 1.2 1.40 1.00 1.40 v v cc = 3.0 v 1.29 1.5 1.71 1.26 1.71 v v cc = 4.5 v 1.84 2.1 2.36 1.81 2.36 v v cc = 5.5 v 2.19 2.5 2.79 2.16 2.79 v
74lvc1g14 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 12 ? 6 august 2012 6 of 20 nxp semiconductors 74lvc1g14 single schmitt-trigger inverter [1] all typical values are measured at t amb = 25 ? c 12. dynamic characteristics [1] typical values are measured at t amb =25 ? c and v cc = 1.8 v, 2.5 v, 2.7 v, 3.3 v and 5.0 v respectively. [2] t pd is the same as t plh and t phl . [3] c pd is used to determine the dynamic power dissipation (p d in ? w). p d =c pd ? v cc 2 ? f i +(c l ? v cc 2 ? f o )where: f i = input frequency in mhz; f o = output frequency in mhz; c l = output load capacitance in pf; v cc = supply voltage in v. v t ? negative-going threshold voltage see figure 10 and figure 11 v cc = 1.8 v 0.46 0.6 0.75 0.46 0.78 v v cc = 2.3 v 0.65 0.8 0.96 0.65 0.99 v v cc = 3.0 v 0.88 1.0 1.24 0.88 1.27 v v cc = 4.5 v 1.32 1.5 1.84 1.32 1.87 v v cc = 5.5 v 1.58 1.8 2.24 1.58 2.27 v v h hysteresis voltage (v t+ ? v t ? ); see figure 10 , figure 11 and figure 12 v cc = 1.8 v 0.26 0.4 0.51 0.19 0.51 v v cc = 2.3 v 0.28 0.4 0.57 0.22 0.57 v v cc = 3.0 v 0.31 0.5 0.64 0.25 0.64 v v cc = 4.5 v 0.40 0.6 0.77 0.34 0.77 v v cc = 5.5 v 0.47 0.6 0.88 0.41 0.88 v table 8. transfer characteristics ?continued voltages are referenced to gnd (ground = 0 v); for load circuit see figure 9 . symbol parameter conditions ? 40 ? c to +85 ?c ? 40 ? c to +125 ?c unit min typ [1] max min max table 9. dynamic characteristics voltages are referenced to gnd (ground = 0 v); for load circuit see figure 9 . symbol parameter conditions ? 40 ? c to +85 ?c ? 40 ? c to +125 ?c unit min typ [1] max min max t pd propagation delay a to y; see figure 8 [2] v cc = 1.65 v to 1.95 v 1.0 4.1 11.0 1.0 14.0 ns v cc = 2.3 v to 2.7 v 0.7 2.8 6.5 0.7 8.5 ns v cc = 2.7 v 0.7 3.2 6.5 0.7 8.5 ns v cc = 3.0 v to 3.6 v 0.7 3.0 5.5 0.7 7.0 ns v cc = 4.5 v to 5.5 v 0.7 2.2 5.0 0.7 6.5 ns c pd power dissipation capacitance v cc = 3.3 v; v i = gnd to v cc [3] - 15.4 - - - pf
74lvc1g14 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 12 ? 6 august 2012 7 of 20 nxp semiconductors 74lvc1g14 single schmitt-trigger inverter 13. waveforms measurement points are given in table 10 . v ol and v oh are typical output voltage levels that occur with the output load. fig 8. the data input (a) to output (y) propagation delays mna640 t phl t plh v m v m a input y output gnd v i v oh v ol table 10. measurement points supply voltage input output v cc v m v m 1.65 v to 1.95 v 0.5 ? v cc 0.5 ? v cc 2.3 v to 2.7 v 0.5 ? v cc 0.5 ? v cc 2.7v 1.5v 1.5v 3.0v to 3.6v 1.5v 1.5v 4.5 v to 5.5 v 0.5 ? v cc 0.5 ? v cc test data is given in table 11 . definitions for test circuit: r l = load resistance. c l = load capacitance including jig and probe capacitance. r t = termination resistance should be equal to the output impedance z o of the pulse generator. v ext = external voltage for measuring switching times. fig 9. test circuit for measuring switching times v ext v cc v i v o mna616 dut c l r t r l r l g
74lvc1g14 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 12 ? 6 august 2012 8 of 20 nxp semiconductors 74lvc1g14 single schmitt-trigger inverter 14. waveforms trans fer characteristics table 11. test data supply voltage input load v ext v cc v i t r =t f c l r l t plh , t phl 1.65 v to 1.95 v v cc ? 2.0ns 30pf 1k ? open 2.3 v to 2.7 v v cc ? 2.0ns 30pf 500 ? open 2.7v 2.7v ? 2.5ns 50pf 500 ? open 3.0v to 3.6v 2.7v ? 2.5ns 50pf 500 ? open 4.5 v to 5.5 v v cc ? 2.5ns 50pf 500 ? open v t+ and v t ? limits at 70 % and 20 %. fig 10. transfer characteristic fig 11. definition of v t+ , v t ? and v h mna207 v o v i v h v t+ v t? mna208 v o v i v h v t+ v t? v cc = 3.0 v. fig 12. typical transfer characteristics 03 v i (v) i cc (ma) 10 0 2 mna641 4 6 8 12
74lvc1g14 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 12 ? 6 august 2012 9 of 20 nxp semiconductors 74lvc1g14 single schmitt-trigger inverter 15. application information the slow input rise and fall times cause ad ditional power dissipation, this can be calculated using th e following formula: p add =f i ? (t r ?? i cc(av) +t f ?? i cc(av) ) ? v cc where: p add = additional power dissipation ( ? w); f i = input frequency (mhz); t r = input rise time (ns); 10 % to 90 %; t f = input fall time (ns); 90 % to 10 %; ? i cc(av) = average additional supply current ( ? a). average ? i cc(av) differs with positive or negative input transitions, as shown in figure 13 . an example of a relaxation circuit using the 74lvc1g14 is shown in figure 14 . linear change of v i between 0.8 v to 2.0 v. all values given are typical unless otherwise specified. fig 13. average additional supply current as a function of supply voltage 02 6 12 0 8 6 4 2 10 mna642 4 v cc (v) average i cc (ma) negative-going edge positive-going edge fig 14. relaxation oscillator mna035 r c f 1 t -- - 1 0.5 rc ? --------------------- ? =
74lvc1g14 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 12 ? 6 august 2012 10 of 20 nxp semiconductors 74lvc1g14 single schmitt-trigger inverter 16. package outline fig 15. package outline sot353-1 (tssop5) unit a 1 a max. a 2 a 3 b p lh e l p wy v ce d (1) e (1) z (1) references outline version european projection issue date iec jedec jeita mm 0.1 0 1.0 0.8 0.30 0.15 0.25 0.08 2.25 1.85 1.35 1.15 0.65 e 1 1.3 2.25 2.0 0.60 0.15 7 0 0.1 0.1 0.3 0.425 dimensions (mm are the original dimensions) note 1. plastic or metal protrusions of 0.15 mm maximum per side are not included. 0.46 0.21 sot353-1 mo-203 sc-88a 00-09-01 03-02-19 w m b p d z e e 1 0.15 13 5 4 a a 2 a 1 l p (a 3 ) detail x l h e e c v m a x a y 1.5 3 mm 0 scale tssop5: plastic thin shrink small outline package; 5 leads; body width 1.25 mm sot353-1 1.1
74lvc1g14 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 12 ? 6 august 2012 11 of 20 nxp semiconductors 74lvc1g14 single schmitt-trigger inverter fig 16. package outline sot753 (sc-74a) references outline version european projection issue date iec jedec jeita sot753 sc-74a wb m b p d e a a 1 l p q detail x h e e v m a a b y 0 1 2 mm scale c x 13 2 4 5 plastic surface-mounted package; 5 leads sot753 unit a 1 b p cd e h e l p qy wv mm 0.100 0.013 0.40 0.25 3.1 2.7 0.26 0.10 1.7 1.3 e 0.95 3.0 2.5 0.2 0.1 0.2 dimensions (mm are the original dimensions) 0.6 0.2 0.33 0.23 a 1.1 0.9 02-04-16 06-03-16
74lvc1g14 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 12 ? 6 august 2012 12 of 20 nxp semiconductors 74lvc1g14 single schmitt-trigger inverter fig 17. package outline sot886 (xson6) references outline version european projection issue date iec jedec jeita sot886 mo-252 sot886_po 04-07-22 12-01-05 unit mm max nom min 0.5 0.04 1.50 1.45 1.40 1.05 1.00 0.95 0.35 0.30 0.27 0.40 0.35 0.32 0.6 a (1) dimensions (mm are the original dimensions) notes 1. including plating thickness. 2. can be visible in some manufacturing processes. xson6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1.45 x 0.5 mm sot886 a 1 b 0.25 0.20 0.17 deee 1 0.5 ll 1 terminal 1 index area d e e 1 e a 1 b l l 1 e 1 0 1 2 mm scale 1 6 2 5 3 4 6x (2) 4x (2) a
74lvc1g14 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 12 ? 6 august 2012 13 of 20 nxp semiconductors 74lvc1g14 single schmitt-trigger inverter fig 18. package outline sot891 (xson6) terminal 1 index area references outline version european projection issue date iec jedec jeita sot891 sot891 05-04-06 07-05-15 xson6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1 x 0.5 mm d e e 1 e a 1 b l l 1 e 1 0 1 2 mm scale dimensions (mm are the original dimensions) unit mm 0.20 0.12 1.05 0.95 0.35 0.27 a 1 max b e 1.05 0.95 d ee 1 l 0.40 0.32 l 1 0.35 0.55 a max 0.5 0.04 1 6 2 5 3 4 a 6 (1) 4 (1) note 1. can be visible in some manufacturing processes.
74lvc1g14 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 12 ? 6 august 2012 14 of 20 nxp semiconductors 74lvc1g14 single schmitt-trigger inverter fig 19. package outline sot1115 (xson6) references outline version european projection issue date iec jedec jeita sot1115 sot1115_po 10-04-02 10-04-07 unit mm max nom min 0.35 0.04 0.95 0.90 0.85 1.05 1.00 0.95 0.55 0.3 0.40 0.35 0.32 a (1) dimensions note 1. including plating thickness. 2. visible depending upon used manufacturing technology. xson6: extremely thin small outline package; no leads; 6 terminals; body 0.9 x 1.0 x 0.35 mm sot1115 a 1 b 0.20 0.15 0.12 deee 1 l 0.35 0.30 0.27 l 1 0 0.5 1 mm scale terminal 1 index area d e (4) (2) e 1 e 1 e l l 1 b 321 6 5 4 (6) (2) a 1 a
74lvc1g14 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 12 ? 6 august 2012 15 of 20 nxp semiconductors 74lvc1g14 single schmitt-trigger inverter fig 20. package outline sot1202 (xson6) references outline version european projection issue date iec jedec jeita sot1202 sot1202_po 10-04-02 10-04-06 unit mm max nom min 0.35 0.04 1.05 1.00 0.95 1.05 1.00 0.95 0.55 0.35 0.40 0.35 0.32 a (1) dimensions note 1. including plating thickness. 2. visible depending upon used manufacturing technology. xson6: extremely thin small outline package; no leads; 6 terminals; body 1.0 x 1.0 x 0.35 mm sot1202 a 1 b 0.20 0.15 0.12 deee 1 l 0.35 0.30 0.27 l 1 0 0.5 1 mm scale terminal 1 index area d e (4) (2) e 1 e 1 e l b 123 l 1 6 5 4 (6) (2) a a 1
74lvc1g14 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 12 ? 6 august 2012 16 of 20 nxp semiconductors 74lvc1g14 single schmitt-trigger inverter fig 21. package outline sot1226 (x2son5) references outline version european projection issue date iec jedec eiaj sot1226 sot1226_po 12-04-10 12-04-25 unit mm max nom min 0.35 0.85 0.80 0.75 0.04 0.30 0.25 0.20 0.85 0.80 0.75 0.27 0.22 0.17 0.05 a (1) dimensions note 1. dimension a is including plating thickness. 2. plastic or metal protrusions of 0.075 mm maximum per side are not included. sot1226 a 1 a 3 0.128 0.040 dd h ebe 0.48 klv 0.1 wy 0.05 0.05 scale 01 m m x terminal 1 index area d e a b detail x a a 1 a 3 c y c y 1 54 terminal 1 index area d h l b k e ac b v c w 2 1 0.20 0.27 0.22 0.17 y 1 x2son5: plastic thermal enhanced extremely thin small outline package; no leads; 5 terminals; body 0.8 x 0.8 x 0.35 mm 3
74lvc1g14 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 12 ? 6 august 2012 17 of 20 nxp semiconductors 74lvc1g14 single schmitt-trigger inverter 17. abbreviations 18. revision history table 12. abbreviations acronym description cmos complementary metal oxide semiconductor ttl transistor-transistor logic hbm human body model esd electrostatic discharge mm machine model dut device under test table 13. revision history document id release date data sheet status change notice supersedes 74lvc1g14 v.12 20120806 product data sheet - 74lvc1g14 v.11 modifications: ? package outline drawing of sot1226 ( figure 21 ) modified. 74lvc1g14 v.11 20120412 product data sheet - 74lvc1g14 v.10 modifications: ? added type number 74lvc1g14gx (sot1226) ? package outline drawing of sot886 ( figure 17 ) modified. 74lvc1g14 v.10 20111206 product data sheet - 74lvc1g14 v.9 modifications: ? legal pages updated. 74lvc1g14 v.9 20110922 product data sheet - 74lvc1g14 v.8 74lvc1g14 v.8 20101110 product data sheet - 74lvc1g14 v.7 74lvc1g14 v.7 20070718 product data sheet - 74lvc1g14 v.6 74lvc1g14 v.6 20060615 product data sheet - 74lvc1g14 v.5 74lvc1g14 v.5 20040910 product specification - 74lvc1g14 v.4 74lvc1g14 v.4 20021119 product specification - 74lvc1g14 v.3 74lvc1g14 v.3 20020521 product specification - 74lvc1g14 v.2 74lvc1g14 v.2 20010406 product specification - 74lvc1g14 v.1 74lvc1g14 v.1 20001212 product specification - -
74lvc1g14 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 12 ? 6 august 2012 18 of 20 nxp semiconductors 74lvc1g14 single schmitt-trigger inverter 19. legal information 19.1 data sheet status [1] please consult the most recently issued document before initiating or completing a design. [2] the term ?short data sheet? is explained in section ?definitions?. [3] the product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple device s. the latest product status information is available on the internet at url http://www.nxp.com . 19.2 definitions draft ? the document is a draft versi on only. the content is still under internal review and subject to formal approval, which may result in modifications or additions. nxp semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall hav e no liability for the consequences of use of such information. short data sheet ? a short data sheet is an extract from a full data sheet with the same product type number(s) and title. a short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. for detailed and full information see the relevant full data sheet, which is available on request vi a the local nxp semiconductors sales office. in case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. product specification ? 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applications that are described herein for any of these products are for illustrative purpos es only. nxp semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. customers are responsible for the design and operation of their applications and products using nxp semiconductors products, and nxp semiconductors accepts no liability for any assistance with applications or customer product design. it is customer?s sole responsibility to determine whether the nxp semiconductors product is suitable and fit for the customer?s applications and products planned, as well as fo r the planned application and use of customer?s third party customer(s). customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. nxp semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer?s applications or products, or the application or use by customer?s third party customer(s). customer is responsible for doing all necessary testing for the customer?s applic ations and products using nxp semiconductors products in order to av oid a default of the applications and the products or of the application or use by customer?s third party customer(s). nxp does not accept any liability in this respect. limiting values ? stress above one or more limiting values (as defined in the absolute maximum ratings system of iec 60134) will cause permanent damage to the device. limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the recommended operating conditions section (if present) or the characteristics sections of this document is not warranted. constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. terms and conditions of commercial sale ? nxp semiconductors products are sold subject to the gener al terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms , unless otherwise agreed in a valid written individual agreement. in case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. nxp semiconductors hereby expressly objects to applying the customer?s general terms and conditions with regard to the purchase of nxp semiconducto rs products by customer. no offer to sell or license ? nothing in this document may be interpreted or construed as an offer to sell products t hat is open for acceptance or the grant, conveyance or implication of any lic ense under any copyrights, patents or other industrial or intellectual property rights. document status [1] [2] product status [3] definition objective [short] data sheet development this document contains data from the objecti ve specification for product development. preliminary [short] data sheet qualification this document contains data from the preliminary specification. product [short] data sheet production this document contains the product specification.
74lvc1g14 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 12 ? 6 august 2012 19 of 20 nxp semiconductors 74lvc1g14 single schmitt-trigger inverter export control ? this document as well as the item(s) described herein may be subject to export control regu lations. export might require a prior authorization from competent authorities. non-automotive qualified products ? unless this data sheet expressly states that this specific nxp semicon ductors product is automotive qualified, the product is not suitable for automotive use. it is neither qualified nor tested in accordance with automotive testing or application requirements. nxp semiconductors accepts no liabili ty for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. in the event that customer uses t he product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without nxp semiconductors? warranty of the product for such automotive applicat ions, use and specifications, and (b) whenever customer uses the product for automotive applications beyond nxp semiconductors? specifications such use shall be solely at customer?s own risk, and (c) customer fully indemnifies nxp semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive app lications beyond nxp semiconductors? standard warranty and nxp semiconduct ors? product specifications. translations ? a non-english (translated) version of a document is for reference only. the english version shall prevail in case of any discrepancy between the translated and english versions. 19.4 trademarks notice: all referenced brands, produc t names, service names and trademarks are the property of their respective owners. 20. contact information for more information, please visit: http://www.nxp.com for sales office addresses, please send an email to: salesaddresses@nxp.com
nxp semiconductors 74lvc1g14 single schmitt-trigger inverter ? nxp b.v. 2012. all rights reserved. for more information, please visit: http://www.nxp.com for sales office addresses, please se nd an email to: salesaddresses@nxp.com date of release: 6 august 2012 document identifier: 74lvc1g14 please be aware that important notices concerning this document and the product(s) described herein, have been included in section ?legal information?. 21. contents 1 general description . . . . . . . . . . . . . . . . . . . . . . 1 2 features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 4 ordering information . . . . . . . . . . . . . . . . . . . . . 2 5 marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 6 functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 7 pinning information . . . . . . . . . . . . . . . . . . . . . . 3 7.1 pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 7.2 pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 8 functional description . . . . . . . . . . . . . . . . . . . 4 9 limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4 10 recommended operating conditions. . . . . . . . 4 11 static characteristics. . . . . . . . . . . . . . . . . . . . . 5 12 dynamic characteristics . . . . . . . . . . . . . . . . . . 6 13 waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 14 waveforms transfer characteristics. . . . . . . . . 8 15 application information. . . . . . . . . . . . . . . . . . . 9 16 package outline . . . . . . . . . . . . . . . . . . . . . . . . 10 17 abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 17 18 revision history . . . . . . . . . . . . . . . . . . . . . . . . 17 19 legal information. . . . . . . . . . . . . . . . . . . . . . . 18 19.1 data sheet status . . . . . . . . . . . . . . . . . . . . . . 18 19.2 definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 19.3 disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 19.4 trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 19 20 contact information. . . . . . . . . . . . . . . . . . . . . 19 21 contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

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